3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9972 has an integrated PLL that provides low-skew and low-jitter clock outputs for high-performance microprocessors. Three independent banks of four outputs as well as an independent PLL feedback output, FB_OUT, provide exceptional flexibility for possible output configurations.

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CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

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