4-bit asynchronous bus arbiter

DESCRIPTION The 74F786 is an asynchronous 4–bit arbiter designed for high speed real–time applications. The priority of arbitration is determined on a first–come first–served basis. Separate bus grant (BGn) outputs are available to indicate which one of the request inputs is served by the arbit

文件：95.19 Kbytes 页数：12 Pages

PHI

飞利浦

4-bit asynchronous bus arbiter

DESCRIPTION\nThe 74F786 is an asynchronous 4–bit arbiter designed for high speed real–time applications. The priority of arbitration is determined on a first–come first–served basis. Separate bus grant (BGn) outputs are available to indicate which one of the request inputs is served by the arbitrati • Arbitrates between 4 asynchronous inputs\n• Separate grant output for each input\n• Common output enable\n• On board 4 input AND gate\n• Metastable–free outputs\n• Industrial temperature range available (–40°C to +85°C) ;

恩XP

恩智浦

4-bit asynchronous bus arbiter

DESCRIPTION The 74F786 is an asynchronous 4–bit arbiter designed for high speed real–time applications. The priority of arbitration is determined on a first–come first–served basis. Separate bus grant (BGn) outputs are available to indicate which one of the request inputs is served by the arbit

文件：95.19 Kbytes 页数：12 Pages

PHI

飞利浦

4-bit asynchronous bus arbiter

DESCRIPTION The 74F786 is an asynchronous 4–bit arbiter designed for high speed real–time applications. The priority of arbitration is determined on a first–come first–served basis. Separate bus grant (BGn) outputs are available to indicate which one of the request inputs is served by the arbit

文件：95.19 Kbytes 页数：12 Pages

PHI

飞利浦

4-bit asynchronous bus arbiter

DESCRIPTION The 74F786 is an asynchronous 4–bit arbiter designed for high speed real–time applications. The priority of arbitration is determined on a first–come first–served basis. Separate bus grant (BGn) outputs are available to indicate which one of the request inputs is served by the arbit

文件：95.19 Kbytes 页数：12 Pages

PHI

飞利浦