Dual 64-bit static shift register

DESCRIPTION The HEF4517B consists of two identical, independent 64-bit static shift registers. Each register has separate clock (CP), data input (D), parallel input-enable/output-enable (PE/EO) and four 3-state outputs of the 16th, 32nd, 48th and 64th bit positions (O16 to O64). Data at the D inp

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PHI

飞利浦

Dual 64-bit static shift register

General description The HEF4517B consists of two identical, independent 64-bit static shift registers. Each register has separate clock (nCP), data input (nD), parallel input-enable/output-enable (nPE/OE) and four 3-state outputs of the 16th, 32nd, 48th, and 64th bit positions (nQ16 to nQ64). Dat

文件：152.05 Kbytes 页数：15 Pages

恩XP

HIGH RELIABILITY FOR LOW COST AVAILABLE AS TCXO AND VCTCXO

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PETERMANN

Heyco짰-Tite Liquid Tight Cordgrips

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Tite Liquid Tight Cordgrips

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Heyco