HD74LS145FPEL中文资料瑞萨数据手册PDF规格书

This BCD-to-decimal decoder / driver consists of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid BCD input logic ensures that all outputs remain off for all invalid binary input conditions. This decoder features high performance, n-p-n output transistors designed for use as indicator / relay drivers or as open-collector logic-circuit drivers.