8 BIT ADDRESSABLE LATCH

DESCRIPTION The HCC/HCF4724B 8-bit addressable latch is a serial-input, parallel-output storage register that can perform a variety of functions. ■ SERIAL DATA INPUT - ACTIVE PARALLEL OUTPUT ■ STORAGE REGISTER CAPABILITY - MASTER CLEAR ■ CAN FUNCTION AS DEMULTIPLEXER ■ STANDARDIZED, SYMMETRIC

文件：302.62 Kbytes 页数：14 Pages

STMICROELECTRONICS

意法半导体

8-bit addressable latch

DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7).

文件：71.4 Kbytes 页数：7 Pages

PHI

飞利浦

8-bit addressable latch

DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7).

文件：71.4 Kbytes 页数：7 Pages

PHI

飞利浦

8-bit addressable latch

DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7).

文件：71.4 Kbytes 页数：7 Pages

PHI

飞利浦