3A DDR Bus Termination Regulator

Description The FAN1655 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV. The FAN1655 i

文件：513.539 Kbytes 页数：9 Pages

Fairchild

仙童半导体

3A DDR Bus Termination Regulator

Description The FAN1655 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV. The FAN1655 i

文件：513.539 Kbytes 页数：9 Pages

Fairchild

仙童半导体

3A DDR Bus Termination Regulator

文件：494.13 Kbytes 页数：9 Pages

Fairchild

仙童半导体

3A DDR Bus Termination Regulator

文件：494.13 Kbytes 页数：9 Pages

Fairchild

仙童半导体

Package：16-TSSOP（0.173"，4.40mm 宽）裸露焊盘；包装：管件 类别：集成电路（IC） 特殊用途稳压器 描述：IC REG CTRLR DDR 1OUT 16TSSOP

ONSEMI

安森美半导体