Cyclone FPGA Family Data Sheet

Introduction The Cyclone® field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR)

文件：1.35316 Mbytes 页数：104 Pages

Altera

阿尔特

Cyclone FPGA Family Data Sheet

Introduction The Cyclone® field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR)

文件：1.35316 Mbytes 页数：104 Pages

Altera

阿尔特

Cyclone FPGA Family Data Sheet

Introduction The Cyclone® field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR)

文件：1.35316 Mbytes 页数：104 Pages

Altera

阿尔特

Cyclone Device Handbook, Volume 1

Introduction The Cyclone® field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR)

文件：5.6013 Mbytes 页数：385 Pages

Altera

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Cyclone FPGA Family

文件：1.14233 Mbytes 页数：94 Pages

Altera

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Cyclone FPGA Family

文件：1.14233 Mbytes 页数：94 Pages

Altera

阿尔特

Cyclone FPGA Family

文件：1.14233 Mbytes 页数：94 Pages

Altera

阿尔特

Cyclone Device Handbook, Volume 1

Intel

英特尔

Package：256-BGA；包装：托盘 类别：集成电路（IC） FPGA（现场可编程门阵列） 描述：IC FPGA 185 I/O 256FBGA

Intel

英特尔

Package：256-BGA；包装：托盘 类别：集成电路（IC） FPGA（现场可编程门阵列） 描述：IC FPGA 185 I/O 256FBGA

Intel

英特尔