DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Receive Equalization Reduces ISI Jitter Due to Media Loss • Transmit Pre-Emphasis Drives Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination: – Minimizes Insertion and Return Losses – R

文件：531.49 Kbytes 页数：21 Pages

TI

德州仪器

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

文件：871.93 Kbytes 页数：19 Pages

TI

德州仪器

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

文件：865.43 Kbytes 页数：19 Pages

TI

德州仪器

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

文件：449.03 Kbytes 页数：14 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

文件：490.88 Kbytes 页数：16 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

具有发送预加重和接收均衡功能的 3.125Gbps LVDS 缓冲器

The DS25BR100 and DS25BR101 are single channel 3.125 Gbps LVDS buffers optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.The DS25BR100 and • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation\n• Transmit Pre-Emphasis Drives Lossy Backplanes and Cables\n• Minimizes Insertion and Return Losses\n• Minimizes Board Space\n• DS25BR101 Eliminates On-Chip Input Termination for Added Design Flexibility\n• Small 3 mm x 3 mm WSO;

TI

德州仪器

丝印：2R100；Package：WSON；DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Receive Equalization Reduces ISI Jitter Due to Media Loss • Transmit Pre-Emphasis Drives Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination: – Minimizes Insertion and Return Losses – R

文件：531.49 Kbytes 页数：21 Pages

TI

德州仪器

丝印：2R100；Package：WSON；DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Receive Equalization Reduces ISI Jitter Due to Media Loss • Transmit Pre-Emphasis Drives Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination: – Minimizes Insertion and Return Losses – R

文件：531.49 Kbytes 页数：21 Pages

TI

德州仪器

丝印：2R100；Package：WSON；DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Receive Equalization Reduces ISI Jitter Due to Media Loss • Transmit Pre-Emphasis Drives Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination: – Minimizes Insertion and Return Losses – R

文件：531.49 Kbytes 页数：21 Pages

TI

德州仪器

丝印：2R100；Package：WSON；DS25BR100 / DS25BR101 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Receive Equalization Reduces ISI Jitter Due to Media Loss • Transmit Pre-Emphasis Drives Lossy Backplanes and Cables • On-Chip 100Ω Input and Output Termination: – Minimizes Insertion and Return Losses – R

文件：531.49 Kbytes 页数：21 Pages

TI

德州仪器