DP80C51中文资料DCD数据手册PDF规格书

OVERVIEW

DP80C51 is an ultra high performance, speed optimized soft core of a single-chip 8-bit embedded controller dedicated for operation with fast (typically on-chip) and slow (off chip) memories. The core has been designed with a special concern for performance to power consumption ratio. This ratio is extended by an advanced power management unit PMU.

DP80C51 soft core is 100 binary and pin compatible with the industry standard 8051 8-bit microcontroller. There are two configurations of the DP80C51: Harward, where external data and program buses are separated, and von Neumann, with common program and external data bus. DP80C51 has Pipelined RISC architecture up to 10 times faster compared to standard architecture and executes 85-200 million instructions persecond. This performance can also be exploited to great advantage in low power applications where the core can be clocked over tentimes more slower than the original implementation for no performance penalty.

DP80C51 is delivered with fully automated testbench and complete set of tests allowing easy package validation at each stage of SoC design flow.

CPU FEATURES

● 100 pin compatible with industry standard 8051

● 100 software compatible with industry standard 8051

● Pipelined RISC architecture enables to execute instructions

up to 10 times faster compared to standard 8051

● 24 times faster multiplication

● 12 times faster addition

● Up to 256 bytes of internal (on-chip) Data Memory

● Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory

Up to 64K bytes of external (off-chip) Data Memory

● User programmable Program Memory Wait States solution for wide range of memories speed

● User programmable External Data Memory Wait States solution for wide range of memories speed

● Dedicated signal for Program Memory writes.

● Interface for additional Special Function Registers

● Fully synthesizable, static synchronous design with

positive edge clocking and no internal tri-states

● Scan test ready

● 2.0 GHz virtual clock frequency in a 0.25u technological process