CDC516DGGR

Marking：CDC516；Package：TSSOP；3.3-V PHASE-LOCK LOOP CLOCK DRIVER

UseCDCVF2510AasaReplacementfor thisDevice Phase-LockLoopClockDistributionfor SynchronousDRAMApplications DistributesOneClockInputtoFourBanks ofFourOutputs SeparateOutputEnableforEachOutput Bank ExternalFeedbackPin(FBIN)IsUsedto SynchronizetheOutputstothe

CDC516DGGR

3.3-V PHASE-LOCK LOOP CLOCK DRIVER

CDC516DGGR

Package：48-TFSOP（0.240"，6.10mm 宽）；包装：托盘 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC 3.3V PLL CLK DRVR 3ST 48TSSOP

CDC516DGGR.B

Marking：CDC516；Package：TSSOP；3.3-V PHASE-LOCK LOOP CLOCK DRIVER

UseCDCVF2510AasaReplacementfor thisDevice Phase-LockLoopClockDistributionfor SynchronousDRAMApplications DistributesOneClockInputtoFourBanks ofFourOutputs SeparateOutputEnableforEachOutput Bank ExternalFeedbackPin(FBIN)IsUsedto SynchronizetheOutputstothe

CDC516DGGRG4

3.3-V PHASE-LOCK LOOP CLOCK DRIVER

CDC516DGGRG4

Package：48-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL CLOCK DVR 3.3V 48-TSSOP