TrenchMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in automotive and genera

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PHI

飞利浦

TrenchMOS logic level FET

Description N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™ technology, featuring very low on-state resistance. Product availability: BUK9524-55A in SOT78 (TO-220AB) BUK9624-55A in SOT404 (D 2-PAK). Features ■ TrenchMOS™ technology ■ Q1

文件：333.26 Kbytes 页数：15 Pages

PHI

飞利浦

isc N-Channel MOSFET Transistor

DESCRIPTION ·Drain Source Voltage : VDSS= 55V(Min) ·Low RDS(ON) ·Fast Switching Speed ·Minimum Lot-to-Lot variations for robust device performance and reliable operation APPLICATIONS ·Designed for Switched Mode Power Supplies (SMPS), motor control,welding, and in general purpose switchi

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ISC

无锡固电

N-channel TrenchMOS logic level FET

1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits AE

文件：318.57 Kbytes 页数：15 Pages

NEXPERIA

安世

TrenchMOS transistor Logic level FET

文件：63.96 Kbytes 页数：8 Pages

PHI

飞利浦

N-channel TrenchMOS logic level FET

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.

Nexperia

安世