AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：3.64225 Mbytes 页数：164 Pages

TI

德州仪器

AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：2.4283 Mbytes 页数：167 Pages

TI

德州仪器

丝印：AM2631C；Package：NFBGA；AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：2.4283 Mbytes 页数：167 Pages

TI

德州仪器

丝印：AM2631C；Package：NFBGA；AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：2.4283 Mbytes 页数：167 Pages

TI

德州仪器

具有实时控制和安全功能且频率高达 400MHz 的单核 Arm® Cortex®-R5F MCU

AM263x Sitara™ Arm® 微控制器旨在满足下一代工业和汽车嵌入式产品复杂的实时处理需求。AM263x MCU 系列由多个引脚对引脚兼容器件组成，具有多达四个 400-MHz Arm® Cortex®-R5F 内核。对于不同的功能安全配置，可以选择将多个 Arm® 内核编程为在锁步选项中运行。工业通信子系统 (ICSS) 支持集成工业以太网通信，例如 PROFINET IRT、TSN 或 EtherCAT®（以及许多其他工业以太网），或用于标准以太网连接或自定义 I/O 接口。该系列设计用于先进的电机控制和带有先进模拟模块的数字电源控制应用。\n\n多个 R5F 内核以 256KB 处理器内核： \n• 16KB 指令缓存，每个 CPU 内核具有 64 位 ECC\n• 64KB 紧耦合存储器 (TCM)，每个 R5F 内核具有 32 位 ECC\n• 2MB 片上 RAM (OCSRAM) \n• ECC 错误保护\n• 支持工业通信协议或电机控制接口的双核可编程实时单元和工业通信子系统 (PRU-ICSS)： \n• PROFINET \n• IO-Link \n• 通用输入/输出 (GPIO)\n• 实时控制子系统 (CONTROLSS)\n• 5 个 12 位逐次逼近寄存器 (SAR) 模数转换器 (ADC) \n• 每个 ADC 6 个可选输入\n• 带缓;

TI

德州仪器

AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：2.4283 Mbytes 页数：167 Pages

TI

德州仪器

AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：2.4283 Mbytes 页数：167 Pages

TI

德州仪器

AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：2.4283 Mbytes 页数：167 Pages

TI

德州仪器

AM263x Sitara™ Microcontrollers

1 Features Processor Cores: • Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400 MHz – 16KB I-cache with 64-bit ECC per CPU core – 16KB D-cache with 32-bit ECC per CPU core – 64KB Tightly-Coupled Memory (TCM) with 32- bit ECC per CPU core – Lockstep or Dual-c

文件：3.64225 Mbytes 页数：164 Pages

TI

德州仪器

具有实时控制和安全功能且频率高达 400MHz 的汽车类单核 Arm® Cortex®-R5F MCU

The AM263x Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263x MCU family consists of multiple pin-to-pin compatible devices with up to four 400 MHz Arm® Cortex®-R5F cores. As an option, the Processor Cores: \n• 16KB I-cache with 64-bit ECC per CPU core\n• 64KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core\n• 2MB of On-Chip RAM (OCSRAM) \n• ECC error protection\n• 1x EDMA to support data movement functions\n• UART (Primary/Backup)\n• Interprocessor communication modules \n•;

TI

德州仪器