Programmable Low Voltage 1:10 LVDS Clock Driver

GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0 or

文件：170.91 Kbytes 页数：12 Pages

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可编程低压1:10 LVDS时钟驱动器

ADN4670是一款低压差分信号(LVDS)时钟驱动器，可以将一路差分时钟输入信号扩展为十路差分时钟输出。这款器件可以通过简单的串行接口进行编程，以便选择两路时钟输入之一(CLK0/CLK0 或CLK1/CLK1) ，以及使能或禁用（三态）任何一路差分输出(Q0/Q0至Q9/Q9) 。ADN4670设计用于50 Ω传输线路环境。\n\n 当使能输入EN为高电平时，可以通过将11个数据位输入移位寄存器中来实现对器件的编程。前10位决定哪些输出使能（0 = 禁用，1 = 使能），第11位选择时钟输入（0 = CLK0，1 = CLK1）。第12个时钟脉冲将数据从移位寄存器传输到控制寄存器 • 低输出偏斜：<30 ps（典型值）\n• 从1路差分时钟输入提供10路LVDS时钟输出\n• 可编程：可以选择两路差分时钟输入之一（CLK0或CLK1），以及使能或禁用各路差分时钟输出\n• 信号速率最高达1.1 GHz（典型值）\n• 电源电压范围：2.375 V至2.625 V;

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Programmable Low Voltage 1:10 LVDS Clock Driver

GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0 or

文件：170.91 Kbytes 页数：12 Pages

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Programmable Low Voltage 1:10 LVDS Clock Driver

GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0 or

文件：241.14 Kbytes 页数：12 Pages

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Programmable Low Voltage 1:10 LVDS Clock Driver

GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0 or

文件：241.14 Kbytes 页数：12 Pages

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Programmable Low Voltage 1:10 LVDS Clock Driver

GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0 or

文件：170.91 Kbytes 页数：12 Pages

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Programmable Low Voltage 1:10 LVDS Clock Driver

GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0 or

文件：241.14 Kbytes 页数：12 Pages

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Programmable Low Voltage 1:10 LVDS Clock Driver

GENERAL DESCRIPTION The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0 or

文件：241.14 Kbytes 页数：12 Pages

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Package：32-WFQFN 裸露焊盘，CSP；包装：卷带（TR） 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUF 2:10 1.1GHZ 32LFCSP

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Package：32-LQFP；包装：托盘 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 2:10 1.1GHZ 32LQFP

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