155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp

GENERAL DESCRIPTION The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications a

文件：363.88 Kbytes 页数：20 Pages

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155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier

FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7&#

文件：354.46 Kbytes 页数：21 Pages

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155/622 Mbps时钟和数据恢复IC，集成限幅放大器

ADN2807可提供下列接收器功能：量化、信号电平检测、时钟和数据恢复，适用于OC-3、OC-12和15/14 FEC数据速率。该器件满足所有的SONET抖动要求，包括抖动传递、抖动产生和抖动容差。所有规格均相对于–40°C至+85°C环境温度而言，除非另有说明。\n\n 该器件主要用于WDM系统，可以结合外部参考时钟或配有外部晶振的片内振荡器使用。ADN2807同时支持本有速率和15/14速率数字包装器，无需更改参考时钟。\n\n 该器件配合PIN二极管和TIA前置放大器，可以实现高度集成的低成本、低功耗光纤接收器。\n\n 当输入信号电平降至用户可调阈值以下时 • 符合SONET抖动传递/产生/容差要求\n\n• 量化器灵敏度：4 mV（典型值）\n\n• 可调限幅电平：±100 mV\n\n• 取得专利的时钟恢复架构\n\n• 信号丢失检测范围：3 mV至15 mV\n\n• 单一参考时钟频率适用于所有速率，包括15/14 (7%)包装器速率\n\n• 选择19.44 MHz、38.88 MHz、77.76 MHz或155.52 MHz REFCLK\n\n• REFCLK输入：LVPECL/LVDS/LVCMOS/LVTTL兼容（LVPECL/LVDS，仅在155.52 MHz时）\n\n• 可选19.44 MHz片内振荡器与外部晶振配合;

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155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier

FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7&#

文件：354.46 Kbytes 页数：21 Pages

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亚德诺

155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp

GENERAL DESCRIPTION The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications a

文件：363.88 Kbytes 页数：20 Pages

AD

亚德诺

155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp

GENERAL DESCRIPTION The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications a

文件：363.88 Kbytes 页数：20 Pages

AD

亚德诺

155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier

FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7&#

文件：354.46 Kbytes 页数：21 Pages

AD

亚德诺

155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier

FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7&#

文件：354.46 Kbytes 页数：21 Pages

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155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp

文件：534.21 Kbytes 页数：20 Pages

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Package：48-WFQFN 裸露焊盘，CSP；包装：散装 类别：集成电路（IC） 应用特定时钟/定时 描述：IC CLOCK/DATA RECOVERY 48LFCSP

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