丝印：A7；Package：DO-214AA；5.0 To 200V 1000W Surface Mount Transient Voltage Suppressors

Features Glass passivated chip 1000W peak pulse power capability with a 10/1000μs waveform Repetitive rate (duty cycle) : 0.01 Typical IR less than 1μA above 10V Excellent clamping capability Very fast response time High temperature soldering: 260℃/10s at terminals. RoHS compliant

文件：3.35517 Mbytes 页数：6 Pages

UNSEMI

优恩半导体

丝印：A7；Package：SOD-123FL；Surface Mount General Purpose Silicon Rectifier

Features For surface mounted applications Low profile package Glass passivated chip junction Ideal for automated placement Lead free in comply with EU RoHS 2011/65/EU directives

文件：2.19937 Mbytes 页数：4 Pages

UNSEMI

优恩半导体

丝印：A7；Package：SOT-323；Silicon Epitaxial Planar Switching Diode

Features • Small package • Low forward voltage • Fast reverse recovery time • Small total capacitance Applications • Ultra high speed switching application

文件：295.06 Kbytes 页数：3 Pages

GWSEMI

唯圣电子

丝印：A7；Package：SOT-323；SOT-323 Plastic-Encapsulate Diodes

FEATURES For high-speed switching applications Connected in series

文件：1.47517 Mbytes 页数：4 Pages

DGNJDZ

南晶电子

丝印：a7；Package：SOT886；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T57 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected di

文件：265.73 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：a7；Package：SOT1115；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T57 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected di

文件：265.73 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：a7；Package：SOT1202；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T57 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected di

文件：265.73 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：a7；Package：SOT363-2；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T57 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected di

文件：265.73 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：A7；Package：SOT-23；Dual Series Switching Diodes

Features - Fast switching speed max: 4ns. - High conductance. - Connected in series. - Surface mount package ideally suited for automatic insertion. - MSL 1. - AEC-Q101 Qualified.

文件：470.77 Kbytes 页数：4 Pages

COMCHIP

典琦

丝印：A7；Package：SOT-23；SMD Switching Diodes

Features - Fast switching speed. - For general purpose switching applications. - High conductance. - AEC-Q101 Qualified.

文件：486.87 Kbytes 页数：4 Pages

COMCHIP

典琦