A6850中文资料阿尔特数据手册PDF规格书

General Description

The a6850 MegaCore function implements an ACIA, which is a universal asynchronous receiver/transmitter (UART). The a6850 provides an interface between a microprocessor and a serial communications channel. The a6850 receives and transmits data in a variety of configurations, including 7- or 8-bit data words, with odd, even, or no parity, and 1 or 2 stop bits.

Features

■ a6850 MegaCore function implementing an asychronous communications interface adapter (ACIA)

■ Optimized for FLEX® and MAX® architectures

■ Programmable word lengths, stop bits, and parity

■ Offers divide-by-1, -16, or -64 mode

■ Includes error detection

■ Uses approximately 237 FLEX logic elements (LEs)

■ Functionally based on the Motorola MC6850 device, except as noted in the “Variations & Clarifications” section on page 94