Two Output Differential Buffer for PCIe Gen1 & Gen2

Description Output Features The ICS9DB102 zero-delay buffer supports PCI Express clocking requirements. The ICS9DB102 is driven by a differential SRC output pair from an ICS CK410/CK505-compliant main clock. It attenuates jitter on the input clock and has a selectable PLL Band Width to maxim

文件：301.33 Kbytes 页数：14 Pages

RENESAS

瑞萨

Two Output Differential Buffer for PCIe Gen1 & Gen2

文件：187.59 Kbytes 页数：13 Pages

IDT

Two Output Differential Buffer for PCIe Gen1 & Gen2

Description Output Features The ICS9DB102 zero-delay buffer supports PCI Express clocking requirements. The ICS9DB102 is driven by a differential SRC output pair from an ICS CK410/CK505-compliant main clock. It attenuates jitter on the input clock and has a selectable PLL Band Width to maxim

文件：301.33 Kbytes 页数：14 Pages

RENESAS

瑞萨

Two Output Differential Buffer for PCIe Gen1 & Gen2

文件：187.59 Kbytes 页数：13 Pages

IDT

Package：20-SSOP（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 应用特定时钟/定时 描述：IC BUFFER ZD/FANOUT 20-SSOP

Renesas Electronics America Inc