93V855YGILF-T中文资料瑞萨数据手册PDF规格书

Recommended Application:

DDR Clock Driver

• Low skew, low jitter PLL clock driver

• External feedback pins for input to output

synchronization

• Spread Spectrum tolerant inputs

• With bypass mode mux

• Operating frequency 60 to 170 MHz

• Operating Temperature –45°C to +85°C

• CYCLE - CYCLE jitter:<75ps

• OUTPUT - OUTPUT skew: <60ps

• Output Rise and Fall Time: 650ps - 950ps