FEATURES

• Sixteen LVCMOS/LVTTL outputs (4 banks of 4 outputs)

• Selectable differential CLK1, nCLK1 or

LVCMOS clock input

• CLK1, nCLK1 pair can accept the following differential input

levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

• CLK0 supports the following input types:

LVCMOS, LVTTL

• Maximum output frequency: 250MHz

• Independent bank control for ÷1 or ÷2 operation

• Independent output bank voltage settings for 3.3V, 2.5V,

or 1.8V operation

• Asynchronous clock enable/disable

• Output skew: 170ps (maximum)

• Bank skew: 30ps (maximum)

• Part-to-part skew: 750ps (maximum)

• 3.3V core, 3.3V, 2.5V, or 1.8V output operating supply

• 0°C to 85°C ambient operating temperature

• Available in lead-free RoHS compliant package

87016属于集成电路（IC） > 时钟发生器，PLL，频率合成器。瑞萨科技有限公司制造生产的87016时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。