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74LVC00APW

Quad 2-input NAND gate

DESCRIPTION The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • Inputs accept voltages up to 5.5V • CMOS low pow

文件:86.62 Kbytes 页数:8 Pages

PHI

飞利浦

PHI

74LVC00APW

Quad 2-input NAND gate

1. General description The 74LVC00A is a quad 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower inpu

文件:235.52 Kbytes 页数:12 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74LVC00APW

Quad 2-input NAND gate Rev. 7 ??25 April 2012

文件:197.76 Kbytes 页数:14 Pages

PHI

飞利浦

PHI

74LVC00APWDH

Quad 2-input NAND gate

DESCRIPTION The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • Inputs accept voltages up to 5.5V • CMOS low pow

文件:86.62 Kbytes 页数:8 Pages

PHI

飞利浦

PHI

74LVC00APW-118

Quad 2-input NAND gate Rev. 7 ??25 April 2012

文件:197.76 Kbytes 页数:14 Pages

PHI

飞利浦

PHI

74LVC00APW-Q100

Quad 2-input NAND gate

文件:745.64 Kbytes 页数:14 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74LVC00APW

Quad 2-input NAND gate

The 74LVC00A provides four 2-input NAND gates.\n Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V appl • 5 V tolerant inputs for interfacing with 5 V logic\n• Wide supply voltage range from 1.2 V to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• Complies with JEDEC standard:• JESD8-7A (1.65 V to 1.95 V)\n• JESD8-5A (2.3 V to 2.7 V)\n• JESD8-C/JESD36 (2.7 V to 3.6 V)\n\n• E;

Nexperia

安世

74LVC00APW-Q100

Quad 2-input NAND gate

The 74LVC00A-Q100 provides four 2-input NAND gates.\n Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• 5 V tolerant inputs for interfacing with 5 V logic\n• Wide supply voltage range from 1.2 V to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL lev;

Nexperia

安世

74LVC00APW,112

Package:14-TSSOP(0.173",4.40mm 宽);包装:管件 类别:集成电路(IC) 门和反相器 描述:IC GATE NAND 4CH 2-INP 14TSSOP

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74LVC00APW,118

Package:14-TSSOP(0.173",4.40mm 宽);包装:管件 类别:集成电路(IC) 门和反相器 描述:IC GATE NAND 4CH 2-INP 14TSSOP

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

技术参数

  • VCC (V):

    1.2 - 3.6

  • Logic switching levels:

    CMOS/LVTTL

  • Output drive capability (mA):

    ± 24

  • tpd (ns):

    2.1

  • fmax (MHz):

    150

  • Nr of bits:

    4

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    144

  • Ψth(j-top) (K/W):

    8.7

  • Rth(j-c) (K/W):

    70

  • Package name:

    TSSOP14

供应商型号品牌批号封装库存备注价格
恩XP
1525+
TSSOP14
5000
原装正品,公司现货
询价
NEXPERIA
24+
N/A
45524
原装正品,现货库存,1小时内发货
询价
恩XP
24+
SSOP14
36500
一级代理/全新现货/长期供应!
询价
恩XP
24+
TSSOP
3580
原装现货/15年行业经验欢迎询价
询价
NEXPERIA
1721
TSSOP-14
45000
全新原装公司现货
询价
恩XP
24+
TSSOP14
134
只做原厂渠道 可追溯货源
询价
NEXPERIA/安世
21+
TSSOP
8080
只做原装,质量保证
询价
PHI
23+
SSOP-14
65000
一级分销商
询价
恩XP
22+
TSSOP14
30000
原装正品
询价
NEXPERIA/安世
24+
TSSOP
33500
全新进口原装现货,假一罚十
询价
更多74LVC00APW供应商 更新时间2025-10-4 11:08:00