Octal D-type flip-flop; positive edge-trigger 3-State

DESCRIPTION The 74LV374 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT374. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (

文件：111.67 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type flip-flop; positive edge-trigger 3-State

DESCRIPTION The 74LV374 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT374. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (

文件：111.67 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type flip-flop; positive edge-trigger 3-State

DESCRIPTION The 74LV374 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT374. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (

文件：111.67 Kbytes 页数：12 Pages

PHI

飞利浦

Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs

Description The HD74LV374A has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going transitions of the clock input. When the clock input goes low, data at the D input

文件：68.56 Kbytes 页数：15 Pages

HitachiHitachi Semiconductor

日立日立公司

Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs

Description The HD74LV374A has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going transitions of the clock input. When the clock input goes low, data at the D input

文件：83.6 Kbytes 页数：10 Pages

RENESAS

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