Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Da

文件：824.91 Kbytes 页数：14 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Da

文件：89.07 Kbytes 页数：11 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Package：14-SOIC（0.154"，3.90mm 宽）；包装：管件 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14SOIC

ONSEMI

安森美半导体

Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Da

文件：89.07 Kbytes 页数：11 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Da

文件：824.91 Kbytes 页数：14 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

文件：682.58 Kbytes 页数：13 Pages

ONSEMI

安森美半导体