型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
---|---|---|---|---|
74HC377 | Octal D-type flip-flop with data enable; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s 文件:60.66 Kbytes 页数:7 Pages | PHI 飞利浦 | PHI | |
74HC377 | Octal D-type flip-flop with data enable; positive-edge trigger 1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LO 文件:256.019 Kbytes 页数:15 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | |
74HC377 | OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE POSITIVE EDGE TRIGGER OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE POSITIVE EDGE TRIGGER 文件:219.42 Kbytes 页数:5 Pages | ETC1List of Unclassifed Manufacturers etc未分类制造商未分类制造商 | ETC1 | |
Octal D-type flip-flop with data enable; positive-edge trigger 1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LO 文件:256.019 Kbytes 页数:15 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Octal D-type flip-flop with data enable; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s 文件:60.66 Kbytes 页数:7 Pages | PHI 飞利浦 | PHI | ||
Octal D-type flip-flop with data enable; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s 文件:60.66 Kbytes 页数:7 Pages | PHI 飞利浦 | PHI | ||
Octal D-type flip-flop with data enable; positive-edge trigger 1. General description The 74HC377-Q100; 74HCT377-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements 文件:255.75 Kbytes 页数:15 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Octal D-type flip-flop with data enable; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s 文件:60.66 Kbytes 页数:7 Pages | PHI 飞利浦 | PHI | ||
Octal D-type flip-flop with data enable; positive-edge trigger 1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LO 文件:256.019 Kbytes 页数:15 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Octal D-type flip-flop with data enable; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s 文件:60.66 Kbytes 页数:7 Pages | PHI 飞利浦 | PHI |
技术参数
- VCC (V):
2.0 - 6.0
- Logic switching levels:
CMOS
- Output drive capability (mA):
± 7.8
- tpd (ns):
13
- fmax (MHz):
83
- Power dissipation considerations:
low
- Tamb (°C):
-40~125
- Rth(j-a) (K/W):
80
- Ψth(j-top) (K/W):
22.7
- Rth(j-c) (K/W):
56
- Package name:
SO20
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI/德州仪器 |
25+ |
null |
32360 |
TI/德州仪器全新特价74HC377即刻询购立享优惠#长期有货 |
询价 | ||
TMS |
06+ |
SOIC |
1000 |
全新原装 绝对有货 |
询价 | ||
TI |
15+ |
SOP-20 |
11560 |
全新原装,现货库存,长期供应 |
询价 | ||
NEC |
25+ |
SOP |
2500 |
原装现货热卖中,提供一站式真芯服务 |
询价 | ||
24+ |
5000 |
公司存货 |
询价 | ||||
PHI |
24+ |
TSSOP20 |
21322 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
询价 | ||
PHI |
25+ |
TSSOP20 |
2987 |
只售原装自家现货!诚信经营!欢迎来电! |
询价 | ||
Nexperia |
24+ |
SO-207.2 |
10000 |
一级代理进口原装现货假一赔十 |
询价 | ||
恩XP |
25+23+ |
SOP20 |
24766 |
绝对原装正品全新进口深圳现货 |
询价 | ||
TI |
20+ |
DIP20 |
11520 |
特价全新原装公司现货 |
询价 |
相关规格书
更多- AIP5532
- NE5532
- NE5532
- NE5532
- NE5532
- NE5532
- NE5532A
- NE5532A
- UNE5532
- MAX232
- MAX232
- MAX232E
- MAX2325
- MAX2324
- MAX2321
- MAX2322
- MAX2320
- MAX232E-TD
- MAX232CPE
- SI7964DP
- SI7909DN
- SI7941DP
- SI7901EDN
- SI7940DP
- SI7956DP
- SI7980DP
- SI7902EDN
- SI7998DP
- SI7960DP
- SI7943DP
- SI7991DP
- SI7923DN
- SI7983DP
- SI7973DP
- SI7949DP
- SPC5605BF1MLQ6
- PI7C8150A
- PI7C8150DMAE
- XRCGB25M000F3N00R0
- WNS40H100CG
- MPC8540PX833LC
- TD62308BFG
- TD62308BP1G
- TD62308BF
- TL074
相关库存
更多- COS5532
- NE5532
- NE5532
- NE5532
- NE5532
- NE5532A
- NE5532-TD
- NE5532NB
- MAX232
- MAX232
- MAX232
- MAX232A
- MAX2323
- MAX2326
- MAX2327
- MAX232E
- MAX232E
- MAX232ESE
- NE5533
- SI7970DP
- SI7958DP
- SI7913DN
- SI7942DP
- SI7911DN
- SI7900EDN
- SI7922DN
- SI7946DP
- SI7945DP
- SI7921DN
- SI7905DN
- SI7938DP
- SI7925DN
- SI7948DP
- SI7946ADP
- SE1
- PI7C8150B
- PI7C8150DNDE
- PERICOMPI7C8150
- WNS40H100C
- WNS40H100CB
- TD62308
- TD62308APG
- TD62308AFG
- GRM21BR71H104JA11#
- TL074