74HC237D

3-to-8 line decoder, demultiplexer with address latches

1.Generaldescription The74HC237isa3-to-8linedecoder,demultiplexerwithlatchesatthethreeaddressinputs(An). The74HC237essentiallycombinesthe3-to-8decoderfunctionwitha3-bitstoragelatch.When thelatchisenabled(LE=LOW),the74HC237actsasa3-to-8activeLOWdecode

74HC237D

丝印：74HC237D；Package：SOIC16；CMOS Digital Integrated Circuits Silicon Monolithic

FunctionalDescription •3-to-8LineDecoder/Latch General The74HC237DisahighspeedCMOS3-to-8DECODERADDRESSLATCHfabricatedwithsilicongateC2MOS technology. ItachievesthehighspeedoperationsimilartoequivalentLSTTLwhilemaintainingtheCMOSlowpower dissipation. Itisc

74HC237D

3-to-8 line decoder/demultiplexer with address latches

GENERALDESCRIPTION The74HC/HCT237arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES •Combines3-to-8decoderwith3-bitlatch •Multipleinputenableforeasyexpansionori

PHI

74HC237D

3-to-8 line decoder, demultiplexer with address latches

GENERALDESCRIPTION The74HC/HCT237arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES •Combines3-to-8decoderwith3-bitlatch •Multipleinputenableforeasyexpansionori

PHI

74HC237D

74HC CMOS logic IC series; Power Dissipation PD 500 mW \n;

Function：3-to-8 Line Decoder/Latch\nNumber of Circuits：1\nRoHS Compatible Product(s) (#)：Available\nAssembly bases：日本\n

74HC237D

3-to-8 line decoder, demultiplexer with address latches; • Combines 3-to-8 decoder with 3-bit latch\n• Multiple input enable for easy expansion or independent controls\n• Active HIGH mutually exclusive outputs\n• Low-power dissipation\n• ESD protection:• HBM JESD22-A114F exceeds 2 000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n;

The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A.\n The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus-oriented systems.\n

74HC237D

3-to-8 line decoder, demultiplexer with address latches

ETC

74HC237D

Package：16-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER 1 X 3:8 16SOIC

ETC

74HC237DB

3-to-8 line decoder, demultiplexer with address latches

1.Generaldescription The74HC237isa3-to-8linedecoder,demultiplexerwithlatchesatthethreeaddressinputs(An). The74HC237essentiallycombinesthe3-to-8decoderfunctionwitha3-bitstoragelatch.When thelatchisenabled(LE=LOW),the74HC237actsasa3-to-8activeLOWdecode

74HC237DB

3-to-8 line decoder/demultiplexer with address latches

GENERALDESCRIPTION The74HC/HCT237arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES •Combines3-to-8decoderwith3-bitlatch •Multipleinputenableforeasyexpansionori

PHI