Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not direct

文件：74.78 Kbytes 页数：7 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not direct

文件：74.78 Kbytes 页数：7 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：159.47 Kbytes 页数：8 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not direct

文件：74.78 Kbytes 页数：7 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司