首页 >UPD48288118A>规格书列表
| 零件编号 | 下载&订购 | 功能描述 | 制造商&上传企业 | LOGO |
|---|---|---|---|---|
UPD48288118A | 288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | |
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Laten cy DRAM Separate I/O Features •SRAM-typeinterface •Double-data-ratearchitecture •PLLcircuitry •Cycletime:1.875ns@tRC=15ns 2.5ns@tRC=15ns 2.5ns@tRC=20ns 3.3ns@tRC=20ns •Non-multiplexedaddresses •Multiplexingoptionisavailable. •DatamaskforWRITEcommands •Differentia | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS | ||
288M-BIT Low Latency DRAM | RENESASRenesas Electronics America 瑞萨瑞萨科技有限公司 | RENESAS |
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Renesas Electronics America In |
21+ |
NA |
12000 |
正品专卖,进口原装深圳现货 |
询价 | ||
Renesa |
21+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
RENESAS |
22+ |
NA |
500000 |
万三科技,秉承原装,购芯无忧 |
询价 | ||
23+ |
N/A |
59000 |
一级代理放心采购 |
询价 | |||
NEC |
20+ |
BGA |
121212 |
原厂VIP渠道,亚太地区一级代理商,可提供更多数量! |
询价 | ||
原装RENES |
23+ |
BGA |
8560 |
受权代理!全新原装现货特价热卖! |
询价 | ||
原装RENESAS |
21+ |
BGA |
80 |
原装现货假一赔十 |
询价 | ||
原装RENESAS |
22+ |
BGA |
32350 |
原装正品 假一罚十 公司现货 |
询价 | ||
RENESAS/瑞萨 |
23+ |
BGA |
50000 |
全新原装正品现货,支持订货 |
询价 | ||
RENESAS/瑞萨 |
21+ |
BGA |
9800 |
只做原装正品假一赔十!正规渠道订货! |
询价 |
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