Features

 Supports single-ended or

differential input clock signals

 Generates four differential

(LVPECL, LVDS, HCSL) or eight

single-ended (CMOS, SSTL,

HSTL) outputs

 Provides signal level translation

Differential to single-ended

Single-ended to differential

Differential to differential

Single-ended to single-ended

 Wide frequency range

LVPECL, LVDS: 5 to 710 MHz

HCSL: 5 to 250 MHz

SSTL, HSTL: 5 to 350 MHz

CMOS: 5 to 200 MHz

 Additive jitter: 150 fs RMS typ

 Output-output skew: 100 ps

 Propagation delay: 2.5 ns typ

 Single core supply with excellent

PSRR: 1.8, 2.5, or 3.3 V

 Output driver supply voltage

independent of core supply: 1.5,

1.8, 2.5, or 3.3 V

 Loss of Signal (LOS) indicator

allows system clock monitoring

 Output Enable (OEB) pin allows

glitchless control of output clocks

 Low power: 10 mA typical core

current

 Industrial temperature range:

–40 to +85 °C

 Small size: 24-lead, 4 x 4 mm

QFN

SI5330M-B00232-GM属于集成电路（IC） > 时钟缓冲器，驱动器。美国思佳讯公司制造生产的SI5330M-B00232-GM时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。