MT8941BP中文资料PDF规格书
MT8941BP规格书详情
Description
The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT transmission link and the ST-BUS are provided by the second PLL locked to an internal or an external 8 kHz frame pulse signal.
Features
• Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock (frame pulse)
• Provides CEPT clock at 2.048 MHz and ST-BUS clock and timing signals locked to an internal or
external 8 kHz reference clock
• Typical inherent output jitter (unfiltered)= 0.07 UI peak-to-peak
• Typical jitter attenuation at: 10 Hz=23 dB,100 Hz=43 dB, 5 to 40 kHz≥64 dB
• Jitter-free “FREE-RUN” mode
• Uncommitted two-input NAND gate
• Low power CMOS technology
产品属性
- 型号:
MT8941BP
- 制造商:
ZARLINK
- 制造商全称:
Zarlink Semiconductor Inc
- 功能描述:
Advanced T1/CEPT Digital Trunk PLL
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ZARLINK/Zarlink Semiconductor |
21+ |
PLCC |
248 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
询价 | ||
MITEL |
2016+ |
PLCC-28 |
8880 |
只做原装,假一罚十,公司可开17%增值税发票! |
询价 | ||
MITEL |
2020+ |
PLCC |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
HARRIS/哈里斯 |
22+ |
PLCC |
600 |
原装现货假一赔十 |
询价 | ||
MITEL |
1815+ |
PLCC28 |
6528 |
只做原装正品现货!或订货,假一赔十! |
询价 | ||
ZARLINK |
23+ |
NA/ |
3376 |
原装现货,当天可交货,原型号开票 |
询价 | ||
ZARLINK |
2022 |
PLCC28 |
80000 |
原装现货,OEM渠道,欢迎咨询 |
询价 | ||
MITEL |
23+ |
SOP16 |
18000 |
询价 | |||
MITEL |
23+ |
PLCC |
30000 |
原装现货,假一赔十. |
询价 | ||
MITEL |
23+ |
PLCC |
500 |
现货或发货一天 |
询价 |