The MC14049B Hex Inverter/Buffer and MC14050B Noninverting

Hex Buffer are constructed with MOS P−Channel and N−Channel

enhancement mode devices in a single monolithic structure. These

complementary MOS devices find primary use where low power

dissipation and/or high noise immunity is desired. These devices

provide logic level conversion using only one supply voltage, VDD.

The input−signal high level (VIH) can exceed the VDD supply

voltage for logic level conversions. Two TTL/DTL loads can be driven

when the devices are used as a CMOS−to−TTL/DTL converter

(VDD = 5.0 V, VOL ≤ 0.4 V, IOL ≥ 3.2 mA).

Note that pins 13 and 16 are not connected internally on these

devices; consequently connections to these terminals will not affect

circuit operation.

Features

• High Source and Sink Currents

• High−to−Low Level Converter

• Supply Voltage Range = 3.0 V to 18 V

• VIN can exceed VDD

• Meets JEDEC B Specifications

• Improved ESD Protection On All Inputs

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

MC14050BDG属于集成电路（IC） > 缓冲器，驱动器，接收器，收发器。安森美半导体公司制造生产的MC14050BDG缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。