DESCRIPTION

The M74HCT138 is an high speed CMOS 3 TO 8 LINE DECODER fabricated with silicon gate C2MOS technology.

If the device is enabled, 3 binary select inputs (A, B, and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

■ HIGH SPEED: tPD = 16ns (TYP.) at VCC = 4.5V

■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX)

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138

M74HCT138B1R属于集成电路（IC） > 信号开关，多路复用器，解码器。意法半导体（ST）集团制造生产的M74HCT138B1R信号开关，多路复用器，解码器逻辑型信号开关、多路复用器和编码器 IC 可用于对以数字格式表示数据的电信号进行路由和选择。这些器件与设计用于模拟信号的类似产品有所不同，它们保留的信息表示为两个电状态之一，而不是两个外部界限内的无穷变化量。