首页>M2V64S30DTP-7L>规格书详情
M2V64S30DTP-7L中文资料PDF规格书
M2V64S30DTP-7L规格书详情
DESCRIPTION
M2V64S20DTP is a 4-bank x 4,194,304-word x 4-bit, M2V64S30DTP is a 4-bank x 2,097,152-word x 8-bit, M2V64S40DTP is a 4-bank x 1,048,576-word x 16-bit, synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. M2V64S20DTP, M2V64S30DTP and M2V64S40DTP achieve very high speed data rate up to 133MHz for -6, and are suitable for main memory or graphic memory in computer systems.
FEATURES
- Single 3.3v±0.3V power supply
- Max. Clock frequency -6:133MHz, -7:100MHz, -8:100MHz
- Fully Synchronous operation referenced to clock rising edge
- 4 bank operation controlled by BA0 & BA1 (Bank Address)
- /CAS latency- 2 and 3 (programmable)
- Burst length- 1, 2, 4, 8 and full page (programmable)
- Burst type- sequential and interleave (programmable)
- Byte Control- DQML and DQMU for M2V64S40DTP
- Random column access
- Auto precharge and All bank precharge controlled by A10
- Auto refresh and Self refresh
- 4096 refresh cycles every 64ms
- LVTTL Interface
- 400-mil, 54-pin Thin Small Outline Package (TSOP II) with 0.8mm lead pitch
产品属性
- 型号:
M2V64S30DTP-7L
- 制造商:
MITSUBISHI
- 制造商全称:
Mitsubishi Electric Semiconductor
- 功能描述:
64M Synchronous DRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
MITSUBIS |
20+ |
TSSOP54 |
2960 |
诚信交易大量库存现货 |
询价 | ||
MIT |
TSOP |
30 |
询价 | ||||
MITSUBIS |
23+ |
TSSOP54 |
35258 |
原装现货库存QQ:2987726803 |
询价 | ||
MITSUBIS |
22+ |
TSSOP54 |
2960 |
诚信交易大量库存现货 |
询价 | ||
MIT |
23+ |
TSSOP-54 |
50000 |
全新原装正品现货,支持订货 |
询价 | ||
MIT |
TSSOP-54 |
265209 |
假一罚十原包原标签常备现货! |
询价 | |||
MIT |
TSOP |
68500 |
一级代理 原装正品假一罚十价格优势长期供货 |
询价 | |||
MIT |
2015+ |
SOP/DIP |
19889 |
一级代理原装现货,特价热卖! |
询价 | ||
MITSUBIS |
22+ |
TSOP |
2000 |
原装正品现货 |
询价 | ||
MIT |
21+ |
TSSOP-54 |
5000 |
原装现货/假一赔十/支持第三方检验 |
询价 |