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K4H510438D-TLB0中文资料PDF规格书
K4H510438D-TLB0规格书详情
Features
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM/DM for write masking only
• Auto & Self refresh
• 15.6us refresh interval(4K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package
产品属性
- 型号:
K4H510438D-TLB0
- 制造商:
SAMSUNG
- 制造商全称:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
SAMSUNG |
0831+ |
TSOP66 |
380 |
全新原装 实单必成 |
询价 | ||
SAMSUNG/三星 |
21+ |
TSOP66 |
10000 |
原装现货假一罚十 |
询价 | ||
SAMSUNG |
22+ |
TSOP |
8000 |
原装正品支持实单 |
询价 | ||
SANSUNG |
21+ |
66TSOP |
35200 |
一级代理/放心采购 |
询价 | ||
SAMSUNG/三星 |
23+ |
BGA |
98900 |
原厂原装正品现货!! |
询价 | ||
SAMSUNG/三星 |
23+ |
TSOP-66 |
89630 |
当天发货全新原装现货 |
询价 | ||
SANSUNG |
2023+ |
66TSOP |
80000 |
一级代理/分销渠道价格优势 十年芯程一路只做原装正品 |
询价 | ||
SAMSUNG |
0831+ |
TSOP66 |
280 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
SAMSUNG |
23+ |
TSSOP |
20000 |
原厂原装正品现货 |
询价 | ||
SAMSUNG |
23+ |
BGA |
5000 |
原装正品,假一罚十 |
询价 |