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● High Performance 16-bit CPU with 4-Stage Pipeline

● 100 ns Instruction Cycle Time at 20 MHz CPU Clock

● 500 ns Multiplication (16 × 16 bit), 1 μs Division (32 / 16 bit)

● Enhanced Boolean Bit Manipulation Facilities

● Register-Based Design with Multiple Variable Register Banks

● Single-Cycle Context Switching Support

● Up to 256 KBytes Linear Address Space for Code and Data

● 1 KByte On-Chip RAM

● 32 KBytes On-Chip ROM (SAB 83C166 only)

● Programmable External Bus Characteristics for Different Address Ranges

● 8-Bit or 16-Bit External Data Bus

● Multiplexed or Demultiplexed External Address/Data Buses

● Hold and Hold-Acknowledge Bus Arbitration Support

● 512 Bytes On-Chip Special Function Register Area

● Idle and Power Down Modes

● 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)

16-Priority-Level Interrupt System

● 10-Channel 10-bit A/D Converter with 9.7 μs Conversion Time ● 16-Channel Capture/Compare Unit

Two Multi-Functional General Purpose Timer Units with 5 Timers

● Two Serial Channels (USARTs)

● Programmable Watchdog Timer

● Up to 76 General Purpose I/O Lines

● Supported by a Wealth of Development Tools like C-Compilers, Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer Disassemblers, Programming Boards

● On-Chip Bootstrap Loader

● 100-Pin Plastic MQFP Package (EIAJ)