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HD74HCT573FPEL中文资料PDF规格书
HD74HCT573FPEL规格书详情
Description
When the latch enable (LE) input is high, the Q outputs of HD74HCT563 will follow the inversion of the D inputs and the Q outputs of HD74HCT573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
Features
• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
• High Speed Operation: tpd (Data to Q, Q) = 13 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 4.5 to 5.5 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
HIT |
23+ |
SOP20 |
20000 |
原厂原装正品现货 |
询价 | ||
HIT |
23+ |
DIP20 |
18000 |
询价 | |||
HITACHI/日立 |
24+ |
DIP |
860000 |
明嘉莱只做原装正品现货 |
询价 | ||
进口原装 |
23+ |
DIP |
1100 |
全新原装现货 |
询价 | ||
HITACHI |
23+ |
DIP20 |
90000 |
只做原厂渠道价格优势可提供技术支持 |
询价 | ||
HITACHI |
2023+ |
SOP-20 |
50000 |
原装现货 |
询价 | ||
HIT |
23+ |
SOP20 |
20000 |
全新原装假一赔十 |
询价 | ||
HITACHI |
2016+ |
DIP20 |
5562 |
只做进口原装现货!或订货!假一赔十! |
询价 | ||
HITACHI |
22+23+ |
DIP20 |
33880 |
绝对原装正品全新进口深圳现货 |
询价 | ||
HITACHI |
2023+ |
DIP20 |
80000 |
一级代理/分销渠道价格优势 十年芯程一路只做原装正品 |
询价 |