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EPM7512AETI100-7中文资料PDF规格书
EPM7512AETI100-7规格书详情
General Description
MAX 7000A (including MAX 7000AE) devices are high-density, high-performance devices based on Altera’s second-generation MAX architecture.
Features...
■ High-performance 3.3-V EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX®) architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with
advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry
compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with
IEEE Std. 1532
■ Built-in boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
■ Supports JEDEC Jam Standard Test and Programming Language
(STAPL) JESD-71
■ Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding
EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding
EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
■ Pin-compatible with the popular 5.0-V MAX 7000S devices
■ High-density PLDs ranging from 600 to 10,000 usable gates
■ Extended temperature range
■ 4.5-ns pin-to-pin logic delays with counter frequencies of up to
227.3 MHz
■ MultiVoltTM I/O interface enables device core to run at 3.3 V, while
I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels
■ Pin counts ranging from 44 to 256 in a variety of thin quad flat pack
(TQFP), plastic quad flat pack (PQFP), ball-grid array (BGA), space
saving FineLine BGATM, and plastic J-lead chip carrier (PLCC)
packages
■ Supports hot-socketing in MAX 7000AE devices
■ Programmable interconnect array (PIA) continuous routing structure
for fast, predictable performance
■ PCI-compatible
■ Bus-friendly architecture, including programmable slew-rate control
■ Open-drain output option
■ Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
■ Programmable power-up states for macrocell registers in
MAX 7000AE devices
■ Programmable power-saving mode for 50 or greater power
reduction in each macrocell
■ Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
■ Programmable security bit for protection of proprietary designs
■ 6 to 10 pin- or logic-driven output enable signals
■ Two global clock signals with optional inversion
■ Enhanced interconnect resources for improved routability
■ Fast input setup times provided by a dedicated path from I/O pin to
macrocell registers
■ Programmable output slew-rate control
■ Programmable ground pins
产品属性
- 型号:
EPM7512AETI100-7
- 制造商:
ALTERA
- 制造商全称:
Altera Corporation
- 功能描述:
High-performance 3.3-V EEPROM-based programmable logic devices(PLDs) built on second-generation Multiple Array MatriX
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ALTERA |
2020+ |
QFP144 |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
ALTERA |
2021+ |
QFP |
8630 |
主营《XILINX》《ALTERA》品牌 |
询价 | ||
ALTERA |
20+/21+ |
DIP-8 |
5600 |
全新原装进口价格优惠 |
询价 | ||
ALTERA |
2016+ |
QFP |
6528 |
只做进口原装现货!或订货,假一赔十! |
询价 | ||
ALTERA |
22+ |
TQFP |
6980 |
原装现货,可开13%税票 |
询价 | ||
ALTERA |
2018+ |
QFP |
30617 |
ALTERA专营品牌全新原装热卖 |
询价 | ||
ALTERA |
2020+ |
QFP |
35000 |
新到原装货,专营系列:查询请Q我 |
询价 | ||
ALTERA |
23+ |
QFP |
6000 |
原装正品,支持实单 |
询价 | ||
ALTERA |
23+ |
QFP |
3000 |
全新原装、诚信经营、公司现货销售 |
询价 | ||
ALTERA |
23+ |
QFP |
3600 |
绝对全新原装!现货!特价!请放心订购! |
询价 |