APA075中文资料PDF规格书
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Device Family Overview
The ProASICPLUS family of devices, Actel’s second generation family of flash FPGAs, offers enhanced performance over Actel’s ProASIC family. It combines the advantages of ASICs with the benefits of programmable devices through nonvolatile flash technology.
Features and Benefits
High Capacity
Commercial and Industrial
• 75,000 to 1 Million System Gates
• 27 K to 198 Kbits of Two-Port SRAM
• 66 to 712 User I/Os
Military
• 300, 000 to 1 Million System Gates
• 72 K to 198 Kbits of Two Port SRAM
• 158 to 712 User I/Os
Reprogrammable Flash Technology
• 0.22 µm 4 LM Flash-Based CMOS Process
• Live At Power-Up (LAPU) Level 0 Support
• Single-Chip Solution
• No Configuration Device Required
• Retains Programmed Design during Power-Down/Up Cycles
• Mil/Aero Devices Operate over Full Military Temperature Range
Performance
• 3.3 V, 32-Bit PCI, up to 50 MHz (33 MHz over military temperature)
• Two Integrated PLLs
• External System Performance up to 150 MHz
Secure Programming
• The Industry’s Most Effective Security Key (FlashLock®)
Low Power
• Low Impedance Flash Switches
• Segmented Hierarchical Routing Structure
• Small, Efficient, Configurable (Combinatorial or Sequential) Logic Cells
High Performance Routing Hierarchy
• Ultra-Fast Local and Long-Line Network
• High-Speed Very Long-Line Network
• High-Performance, Low Skew, Splittable Global Network
• 100 Routability and Utilization
I/O
• Schmitt-Trigger Option on Every Input
• 2.5 V / 3.3 V Support with Individually-Selectable Voltage and Slew Rate
• Bidirectional Global I/Os
• Compliance with PCI Specification Revision 2.2
• Boundary-Scan Test IEEE Std. 1149.1 (JTAG) Compliant
• Pin-Compatible Packages across the ProASICPLUS Family
Unique Clock Conditioning Circuitry
• PLL with Flexible Phase, Multiply/Divide, and Delay Capabilities
• Internal and/or External Dynamic PLL Configuration
• Two LVPECL Differential Pairs for Clock or Data Inputs
Standard FPGA and ASIC Design Flow
• Flexibility with Choice of Industry-Standard Front-End Tools
• Efficient Design through Front-End Timing and Gate Optimization
ISP Support
• In-System Programming (ISP) via JTAG Port
SRAMs and FIFOs
• SmartGen Netlist Generation Ensures Optimal Usage of Embedded Memory Blocks
• 24 SRAM and FIFO Configurations with Synchronous and Asynchronous Operation up to 150 MHz (typical)
产品属性
- 产品编号:
APA075-FG144A
- 制造商:
Microchip Technology
- 类别:
集成电路(IC) > FPGA(现场可编程门阵列)
- 系列:
ProASICPLUS
- 包装:
托盘
- 电压 - 供电:
2.375V ~ 2.625V
- 安装类型:
表面贴装型
- 工作温度:
-40°C ~ 125°C(TJ)
- 封装/外壳:
144-LBGA
- 供应商器件封装:
144-FPBGA(13x13)
- 描述:
IC FPGA 100 I/O 144FBGA
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ACTEL |
2016+ |
QFP |
2600 |
只做原装,假一罚十,公司可开17%增值税发票! |
询价 | ||
ACTEL |
2020+ |
TQFP144 |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
Microchip/Microsemi |
23+ |
PQFP-208 |
2682 |
原厂原装正品现货,代理渠道,支持订货!!! |
询价 | ||
ACTEL |
19+ |
N/A |
23 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
ACTEL |
20+ |
QFP208 |
19570 |
原装优势主营型号-可开原型号增税票 |
询价 | ||
Microsemi(美高森美) |
23+ |
FPBGA144 |
6000 |
询价 | |||
ACTEL |
23+ |
PQFP |
3000 |
全新原装、诚信经营、公司现货销售! |
询价 | ||
MICROCHIP/微芯 |
22+ |
QFP208 |
3200 |
专注工厂库存代销,价格优势f |
询价 | ||
ACTEL |
23+ |
QFP100 |
6000 |
原装正品,支持实单 |
询价 | ||
MICROCHIP/微芯 |
24+ |
QFP-208 |
860000 |
明嘉莱只做原装正品现货 |
询价 |
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