GENERAL DESCRIPTION

The AD9865 is a mixed-signal front end (MxFE) IC for transceiver applications requiring Tx and Rx path functionality with data rates up to 80 MSPS. Its flexible digital interface, power saving modes, and high Tx-to-Rx isolation make it well suited for half- and full-duplex applications. The digital interface is extremely flexible allowing simple interfaces to digital back ends that support half- or full-duplex data transfers, thus

often allowing the AD9865 to replace discrete ADC and DAC solutions. Power saving modes include the ability to reduce power consumption of individual functional blocks, or to power down unused blocks in half-duplex applications.

FEATURES

Low cost 3.3 V CMOS MxFETM for broadband modems

10-bit D/A converter

2×/4× interpolation filter

200 MSPS DAC update rate

Integrated 23 dBm line driver with 19.5 dB gain control

10-bit, 80 MSPS A/D converter

−12 dB to +48 dB low noise RxPGA (< 3.0 nV/rtHz)

Third order, programmable low-pass filter

Flexible digital data path interface

Half- and full-duplex operation

Backward-compatible with AD9975 and AD9875

Various power-down/reduction modes

Internal clock multiplier (PLL)

2 auxiliary programmable clock outputs

Available in 64-lead chip scale package or bare die

APPLICATIONS

Powerline networking

VDSL and HPNA

AD9865BCP属于RF/IF，射频/中频和 RFID > 射频前端（LNA + PA）。亚德诺半导体技术有限公司制造生产的AD9865BCP射频前端（LNA + PA）本系列中的产品是各种集成电路，其中集成了射频 (RF) 信号链连接到系统天线的部分中常见的一种或多种功能，如低噪声放大器 (LNA) 和可编程放大器 (PA)。任何给定器件所含的实际功能各不相同，相比旨在提供更高应用灵活性的器件，针对相对较窄应用的器件通常集成更大一部分必要的信号链。