GENERAL DESCRIPTION

The AD9553 is a phase-locked loop (PLL) based clock translator designed to address the needs of passive optical networks (PON) and base stations. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. The user supplies up to two single-ended input reference signals or one differential input reference signal via the REFA and REFB inputs. The device supports holdover applications by allowing the user to connect a 25 MHz crystal resonator to the XTAL input.

FEATURES

Input frequencies from 8 kHz to 710 MHz

Output frequencies up to 810 MHz LVPECL and LVDS (up to

200 MHz for CMOS output)

Preset pin-programmable frequency translation ratios cover

popular wireline and wireless frequency applications,

including xDSL, T1/E1, BITS, SONET, and Ethernet

Arbitrary frequency translation ratios via SPI port

On-chip VCO

Accepts a crystal resonator for holdover applications

Two single-ended (or one differential) reference input(s)

Two output clocks (independently programmable as LVDS,

LVPECL, or CMOS)

SPI-compatible, 3-wire programming interface

Single supply (3.3 V)

Very low power: <450 mW (under most conditions)

Small package size (5 mm × 5 mm)

Exceeds Telcordia GR-253-CORE jitter generation, transfer,

and tolerance specifications

APPLICATIONS

Cost effective replacement of high frequency VCXO, OCXO,

and SAW resonators

Extremely flexible frequency translation for SONET/SDH,

Ethernet, Fibre Channel, DRFI/DOCSIS, and

PON/EPON/GPON

Wireless infrastructure

Test and measurement (including handheld devices)

AD9553/PCBZ属于开发板，套件，编程器 > 评估和演示板及套件。亚德诺半导体技术有限公司制造生产的AD9553/PCBZ评估和演示板及套件该系列产品提供了一种方便的方法，在经过验证的实施环境中评估某些重点器件的性能或特性。评估方法通常有完善的文档说明，并且视乎具体情况由评估软件提供支持。产品通常由印刷电路板组成，板上已装有重点器件以及必要或有用的支持元器件，另外也可能包括其他组件，例如电缆或电源。对于数量特别多或类别独特的器件类别(如 ADC、DAC 和开关模式电源)，评估平台可组合为一个单独的产品系列。