GENERAL DESCRIPTION

The AD9271 is designed for low cost, low power, small size, and ease of use. It contains eight channels of a variable gain amplifier (VGA) with low noise preamplifier (LNA); an antialiasing filter (AAF); and a 12-bit, 10 MSPS to 50 MSPS analog-to-digital converter (ADC).

FEATURES

8 channels of LNA, VGA, AAF, and ADC

Low noise preamplifier (LNA)

Input-referred noise = 1.2 nV/√Hz @ 7.5 MHz typical

SPI-programmable gain = 14 dB/15.6 dB/18 dB

Single-ended input; VINmaximum = 400 mV p-p/333 mV p-p/250 mV p-p

Dual mode, active input impedance match

Bandwidth (BW) > 70 MHz

Full-scale (FS) output = 2 V p-p diff

Variable gain amplifier (VGA)

Gain range = −6 dB to +24 dB

Linear-in-dB gain control

Antialiasing filter (AAF)

3rd-order Butterworth cutoff

Programmable from 8 MHz to 18 MHz

Analog-to-digital converter (ADC)

12 bits at 10 MSPS to 50 MSPS

SNR = 70 dB

SFDR = 80 dB

Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)

Data and frame clock outputs

Includes crosspoint switch to support

continuous wave (CW) Doppler

Low power, 150 mW/channel at 12 bits/40 MSPS (TGC)

60 mW/channel in CW Doppler

Single 1.8 V supply (3.3 V supply for CW Doppler output bias)

Flexible power-down modes

Overload recovery in <10 ns

Fast recovery from low power standby mode, <2 μs

100-pin TQFP

AD9271BSVZ-50属于集成电路（IC） > 模数转换器（ADC）。亚德诺半导体技术有限公司制造生产的AD9271BSVZ-50模数转换器（ADC）模数转换器（ADC、A/D 或 A 转 D）对模拟信号进行采样，例如由麦克风采集的声音或传感器的输出，然后将其转换为数字信号。一般来说，数字输出是二进制补码二进制数，与输入成比例。输入类型可能是差分、伪差分或单端输入。模数转换器可按照位数、采样率、输入数、接口、转换器数和架构（例如自适应增量、双斜率、折叠、流水线、SAR、三角积分、两步式）进行选择。