Features

• Fixed feedback path; 0ps input-to-output delay

• 9 Selectable SMBus addresses; multiple devices can share

same SMBus segment

• 8 dedicated OE# pins; hardware control of outputs

• PLL or bypass mode; PLL can dejitter incoming clock

• Selectable PLL BW; minimizes jitter peaking in downstream PLL's

• Hardware or software control of PLL operating mode;

change mode with software mode does not need power cycle

• Spread spectrum compatible; tracks spreading input clock

for EMI reduction

• SMBus Interface; unused outputs can be disabled

• 100MHz and 133.33MHz PLL mode; legacy QPI support

• 72-QFN 10 x 10 mm package; small board footprint

9ZX21901D属于集成电路（IC） > 应用特定时钟/定时。瑞萨科技有限公司制造生产的9ZX21901D应用特定时钟/定时专用时钟和计时 IC（集成电路）产品族中的产品主要用于执行与时间或频率信息生成和分配相关的各种操作，适合的设计环境较特定，例如 AMD 和 Intel 的中央处理单元 (CPU) 或图形处理单元 (GPU)、DVD 音频设备、蓝光光盘播放器、以太网设备、PCIe、SATA、光纤通道接口、车载娱乐总线等。