Description

The 9DBV0441 is a member of Renesas’ SOC-Friendly

1.8V Very-Low-Power (VLP) PCIe family. It has integrated

output terminations providing Zo = 100 for direct

connection to 100 transmission lines. The device has 4

output enables for clock management, and 3 selectable

SMBus addresses.

Features/Benefits

• Direct connection to 100 transmission lines; saves 16

resistors compared to standard HCSL outputs

• 53mW typical power consumption in PLL mode; minimal

power consumption

• Spread Spectrum (SS) compatible; allows use of SS for

EMI reduction

• OE# pins; support DIF power management

• HCSL compatible differential input; can be driven by

common clock sources

• Programmable Slew rate for each output; allows tuning

for various line lengths

• Programmable output amplitude; allows tuning for

various application environments

• Pin/software selectable PLL bandwidth and PLL Bypass;

minimize phase jitter for each application

• Outputs blocked until PLL is locked; clean system

start-up

• Software selectable 50MHz or 125MHz PLL operation;

useful for Ethernet applications

• Configuration can be accomplished with strapping pins;

SMBus interface not required for device control

• 3.3V tolerant SMBus interface works with legacy

controllers

• Space saving 5 × 5mm 32-VFQFPN; minimal board

space

• Selectable SMBus addresses; multiple devices can

easily share an SMBus segment

9DBV0441属于集成电路（IC） > 应用特定时钟/定时。瑞萨科技有限公司制造生产的9DBV0441应用特定时钟/定时专用时钟和计时 IC（集成电路）产品族中的产品主要用于执行与时间或频率信息生成和分配相关的各种操作，适合的设计环境较特定，例如 AMD 和 Intel 的中央处理单元 (CPU) 或图形处理单元 (GPU)、DVD 音频设备、蓝光光盘播放器、以太网设备、PCIe、SATA、光纤通道接口、车载娱乐总线等。