DESCRIPTION

The 74VHC126 is an advanced high-speed CMOS QUAD BUS BUFFERs fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The device requires the 3-STATE control input G to be set low to place the output go in to the high impedance state.

■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ POWER DOWN PROTECTION ON INPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 126

■ IMPROVED LATCH-UP IMMUNITY

■ LOW NOISE: VOLP = 0.8V (MAX.)

74VHC126T属于集成电路（IC） > 缓冲器，驱动器，接收器，收发器。意法半导体（ST）集团制造生产的74VHC126T缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。