1. General description

The 74LVC1G125-Q100 is a single buffer/line driver with 3-state output. Inputs can be driven from

either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed

3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower

input rise and fall times. This device is fully specified for partial power down applications using IOFF.

The IOFF circuitry disables the output, preventing the potentially damaging backflow current through

the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

• Wide supply voltage range from 1.65 V to 5.5 V

• Overvoltage tolerant inputs to 5.5 V

• High noise immunity

• CMOS low power consumption

• IOFF circuitry provides partial Power-down mode operation

• ±24 mA output drive (VCC = 3.0 V)

• Latch-up performance exceeds 250 mA

• Direct interface with TTL levels

• Complies with JEDEC standards:

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8C (2.7 V to 3.6 V)

• JESD36 (4.5 V to 5.5 V)

• ESD protection:

• MIL-STD-883, method 3015 exceeds 2000 V

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)

• Multiple package options

74LVC1G125GM-Q100属于集成电路（IC） > 缓冲器，驱动器，接收器，收发器。安世半导体(中国)有限公司制造生产的74LVC1G125GM-Q100缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。