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74LVC161PW集成电路(IC)计数器除法器规格书PDF中文资料
厂商型号 |
74LVC161PW |
参数属性 | 74LVC161PW 封装/外壳为16-TSSOP(0.173",4.40mm 宽);包装为管件;类别为集成电路(IC) > 计数器,除法器;产品描述:IC SYNC 4BIT BIN COUNTER 16TSSOP |
功能描述 | Presettable synchronous 4-bit binary counter; asynchronous reset |
文件大小 |
298.21 Kbytes |
页面数量 |
19 页 |
生产厂商 | Nexperia B.V. All rights reserved |
企业简称 |
NEXPERIA【安世】 |
中文名称 | 安世半导体(中国)有限公司官网 |
原厂标识 | |
数据手册 | |
更新时间 | 2024-6-6 16:31:00 |
74LVC161PW规格书详情
1. General description
The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry.
Synchronous operation is provided by having all flip-flops clocked simultaneously on the
positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH
or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the
data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the
clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW
at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE,
CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies
serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed
forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH
output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to
enable the next cascaded stage.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices
as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
2. Features and benefits
• Overvoltage tolerant inputs to 5.5 V
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power dissipation
• Direct interface with TTL levels
• Asynchronous reset
• Synchronous counting and loading
• Two count enable inputs for n-bit cascading
• Positive edge-triggered clock
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
74LVC161PW属于集成电路(IC) > 计数器,除法器。安世半导体(中国)有限公司制造生产的74LVC161PW计数器,除法器计数器和除法器 IC 是数字逻辑器件,可对输入发生的逻辑转换进行计数,然后使用多个并行输出重新发送累加的计数,和/或生成单个输出信号转换,从而对应用某些整数数量输入信号转换进行响应。除了简单的事件计数,它们还可用于各种频率合成应用。
产品属性
- 产品编号:
74LVC161PW,118
- 制造商:
Nexperia USA Inc.
- 类别:
集成电路(IC) > 计数器,除法器
- 系列:
74LVC
- 包装:
管件
- 逻辑类型:
二进制计数器
- 方向:
上
- 复位:
异步
- 定时:
同步
- 触发器类型:
正边沿
- 工作温度:
-40°C ~ 125°C
- 安装类型:
表面贴装型
- 封装/外壳:
16-TSSOP(0.173",4.40mm 宽)
- 供应商器件封装:
16-TSSOP
- 描述:
IC SYNC 4BIT BIN COUNTER 16TSSOP
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
NXP |
23+ |
TSSOP16 |
5000 |
原装正品,假一罚十 |
询价 | ||
NEXPERIA/安世 |
2022+ |
2500 |
6600 |
只做原装,假一罚十,长期供货。 |
询价 | ||
NXP(恩智浦) |
23+ |
标准封装 |
6000 |
正规渠道,只有原装! |
询价 | ||
NXP(恩智浦) |
23+ |
N/A |
589610 |
新到现货 原厂一手货源 价格秒杀代理! |
询价 | ||
NXP(恩智浦) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
询价 | ||
NXP/恩智浦 |
TSSOP16 |
198589 |
假一罚十原包原标签常备现货! |
询价 | |||
PHILIPS/飞利浦 |
2402+ |
TSSOP-16 |
8324 |
原装正品!实单价优! |
询价 | ||
NXP |
23+ |
SOP |
20000 |
全新原装假一赔十 |
询价 | ||
NXP/恩智浦 |
23+ |
TSSOP-16 |
90000 |
只做原装 全系列供应 价格优势 可开增票 |
询价 | ||
NXP/恩智浦 |
22+ |
TSSOP16 |
9000 |
原装正品 |
询价 |