Low-Voltage CMOS Quad Buffer

With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)

The 74LVC125A is a high performance, non−inverting quad buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows 74LVC125A inputs to be safely driven from 5.0 V devices. The 74LVC125A is suitable for memory address driving and all TTL level bus oriented transceiver applications.

Features

• Designed for 1.2 to 3.6 V VCC Operation

• 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic

• Supports Live Insertion and Withdrawal

• IOFF Specification Guarantees High Impedance When VCC = 0 V

• 24 mA Output Sink and Source Capability

• Near Zero Static Supply Current in all Three Logic States (10 A)

Substantially Reduces System Power Requirements

• ESD Performance: Human Body Model >2000 V

Machine Model >200 V

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant

74LVC125A属于集成电路（IC） > 缓冲器，驱动器，接收器，收发器。安森美半导体公司制造生产的74LVC125A缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。