1. General description

The 74LV00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of

current limiting resistors to interface inputs to voltages in excess VCC.

2. Features and benefits

• Wide supply voltage range from 1.0 to 5.5 V

• CMOS low power dissipation

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Optimized for low voltage applications: 1.0 V to 3.6 V

• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C

• Complies with JEDEC standards:

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8C (2.7 V to 3.6 V)

• JESD36 (4.5 V to 5.5 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Multiple package options

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

74LV00PW属于集成电路（IC） > 门和反相器。安世半导体(中国)有限公司制造生产的74LV00PW门和反相器逻辑栅极和逆变器系列中的产品对单个逻辑信号执行基本逻辑运算（例如 AND、NOT、OR 等）。与触发器不同，它们不能够存储信息，不会对提供给其输入的信号立即做出响应。虽然早就被集成电路实施形式所取代，以用于实现复杂功能，但分立栅极仍可在仅需要非常简单逻辑功能的情况下使用。