Octal 3−State Noninverting D Flip−Flop

High−Performance Silicon−Gate CMOS

The 74HC574 is identical in pinout to the LS574. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs.

Data meeting the set−up time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does not affect the states of the flip−flops but when Output Enable is high, all device outputs are forced to the high−impedance state. Thus, data may be stored even when the outputs are not enabled.

The HC574 is identical in function to the HC374A but has the flip−flop inputs on the opposite side of the package from the outputs to facilitate PC board layout.

Features

• Output Drive Capability: 15 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 μA

• In Compliance with the Requirements Defined by JEDEC Standard No. 7A

• ESD Performance: HBM > 2000 V; Machine Model > 200 V

• Chip Complexity: 266 FETs or 66.5 Equivalent Gates

• This is a Pb−Free Device

74HC574属于集成电路（IC） > 触发器。安森美半导体公司制造生产的74HC574触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。