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74ALVCH16501DGG集成电路(IC)通用总线功能规格书PDF中文资料
厂商型号 |
74ALVCH16501DGG |
参数属性 | 74ALVCH16501DGG 封装/外壳为56-TFSOP(0.240",6.10mm 宽);包装为卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带;类别为集成电路(IC) > 通用总线功能;产品描述:IC UNIV BUS TXRX 18BIT 56TSSOP |
功能描述 | 18-bit universal bus transceiver; 3-state |
文件大小 |
253.8 Kbytes |
页面数量 |
15 页 |
生产厂商 | Nexperia B.V. All rights reserved |
企业简称 |
NEXPERIA【安世】 |
中文名称 | 安世半导体(中国)有限公司官网 |
原厂标识 | |
数据手册 | |
更新时间 | 2024-5-17 22:50:00 |
74ALVCH16501DGG规格书详情
1. General description
The 74ALVCH16501 is an 18-bit universal transceiver with bus hold inputs and 3-state outputs.
Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB
and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held
at a HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the
LOW-to-HIGH transition of CPAB. When OEAB is HIGH, the outputs are active. When OEAB is
LOW, the outputs are in the high-impedance state. Data flow for B-to-A is similar to that of A-to-B
but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active HIGH
and OEBA is active LOW). This device is fully specified for partial power down applications using
IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current
through the device when it is powered down.
2. Features and benefits
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power dissipation
• Direct interface with TTL levels
• Current drive ±24 mA at VCC = 3.0 V
• Universal bus transceiver with D-type latches and D-type flip-flops capable of operating in
transparent, latched or clocked mode
• Bus hold on all data inputs
• Output drive capability 50 Ω transmission lines at 85 °C
• 3-state non-inverting outputs for bus-oriented applications
• Latch-up performance exceeds 100 mA per JESD78 Class II Level B
• Complies with JEDEC standards:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8C (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• Specified from -40 °C to +85 °C
74ALVCH16501DGG属于集成电路(IC) > 通用总线功能。安世半导体(中国)有限公司制造生产的74ALVCH16501DGG通用总线功能通用总线功能系列产品是元件级产品,用于处理或操作一系列(通常为 8 个或更多)并行逻辑信号(称为总线)。所执行的功能包括临时存储要发送或接收的数据,执行缓冲以允许输出电流容量有限的器件(例如微处理器)通过远距离互连高速传输数据,以及调换或移动总线内的位顺序等。
产品属性
- 产品编号:
74ALVCH16501DGG,11
- 制造商:
Nexperia USA Inc.
- 类别:
集成电路(IC) > 通用总线功能
- 系列:
74ALVCH
- 包装:
卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带
- 逻辑类型:
通用总线收发器
- 电路数:
18 位
- 电流 - 输出高、低:
24mA,24mA
- 电压 - 供电:
2.3V ~ 3.6V
- 工作温度:
-40°C ~ 85°C
- 安装类型:
表面贴装型
- 封装/外壳:
56-TFSOP(0.240",6.10mm 宽)
- 供应商器件封装:
56-TSSOP
- 描述:
IC UNIV BUS TXRX 18BIT 56TSSOP
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI |
23+ |
TSSOP |
20000 |
全新原装假一赔十 |
询价 | ||
TI |
2020+ |
SSOP56 |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
NXP/恩智浦 |
22+ |
TSSOP-56 |
6000 |
只做原装,假一赔十 |
询价 | ||
NXP/恩智浦 |
21+ |
TSSOP-56 |
8800 |
公司只做原装正品 |
询价 | ||
ph |
22+ |
N/A |
6980 |
原装现货,可开13%税票 |
询价 | ||
TI |
23+ |
NA |
2696 |
专做原装正品,假一罚百! |
询价 | ||
TI/德州仪器 |
24+ |
TSSOP-56 |
860000 |
明嘉莱只做原装正品现货 |
询价 | ||
nxp/NXP Semiconductors/恩智浦/ |
21+ |
TSSOP-56 |
14637 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
询价 | ||
22+ |
5000 |
询价 | |||||
TI/德州仪器 |
21+ |
SSOP56 |
3200 |
公司只做原装,诚信经营 |
询价 |