FEATURES:

• Choose among the following memory organizations:

IDT72T7285 ⎯ 16,384 x 72

IDT72T7295 ⎯ 32,768 x 72

IDT72T72105 ⎯ 65,536 x 72

IDT72T72115 ⎯ 131,072 x 72

• Up to 225 MHz Operation of Clocks

• User selectable HSTL/LVTTL Input and/or Output

• Read Enable & Read Clock Echo outputs aid high speed operation

• User selectable Asynchronous read and/or write port timing

• 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage

• 3.3V Input tolerant

• Mark & Retransmit, resets read pointer to user marked position

• Write Chip Select (WCS) input disables Write Port HSTL inputs

• Read Chip Select (RCS) synchronous to RCLK

• Programmable Almost-Empty and Almost-Full flags, each flag can

default to one of eight preselected offsets

• Program programmable flags by either serial or parallel means

• Selectable synchronous/asynchronous timing modes for Almost-

Empty and Almost-Full flags

• Separate SCLK input for Serial programming of flag offsets

• User selectable input and output port bus-sizing

72T72115L4-4BBG属于集成电路（IC） > FIFO 存储器。瑞萨科技有限公司制造生产的72T72115L4-4BBGFIFO 存储器先入先出 (FIFO) 存储器可用于数字信息的短期存储，其中信息检索顺序和序列与信息存储顺序和序列相同。这类产品又称为队列或缓冲存储器，通常用于在单独的设备之间交换信息，尤其是在数据以不同的速率或在略微不同的时间点生成和使用的情况下。