2064VL中文资料PDF规格书
2064VL规格书详情
Description
The ispLSI 2064VL is a High Density Programmable Logic Device available in 64 and 32 I/O-pin versions. The device contains 64 Registers, four Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP).
Features
• SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC
— 2000 PLD Gates
— 64 and 32 I/O Pin Versions, Four Dedicated Inputs
— 64 Registers
— High Speed Global Interconnect
— Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
— 100 Functional, JEDEC and Pinout Compatible with
ispLSI 2064V and 2064VE Devices
• 2.5V LOW VOLTAGE 2064 ARCHITECTURE
— Interfaces with Standard 3.3V TTL Devices (Inputs
and I/Os are 3.3V Tolerant)
— 60 mA Typical Active Current
• HIGH-PERFORMANCE E2CMOS® TECHNOLOGY
— fmax = 165MHz Maximum Operating Frequency
— tpd = 5.5ns Propagation Delay
— Electrically Erasable and Reprogrammable
— Non-Volatile
— 100 Tested at Time of Manufacture
— Unused Product Term Shutdown Saves Power
• IN-SYSTEM PROGRAMMABLE
— 2.5V In-System Programmability (ISP™) Using
Boundary Scan Test Access Port (TAP)
— Open-Drain Output Option for Flexible Bus Interface
Capability, Allowing Easy Implementation of Wired-OR
or Bus Arbitration Logic
— Increased Manufacturing Yields, Reduced Time-toMarket
and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
• 100 IEEE 1149.1 BOUNDARY SCAN TESTABLE
• THE EASE OF USE AND FAST SYSTEM SPEED OF
PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAs
— Enhanced Pin Locking Capability
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global
Interconnectivity
• ispDesignEXPERT™ – LOGIC COMPILER AND COMPLETE
ISP DEVICE DESIGN SYSTEMS FROM HDL
SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING
— Superior Quality of Results
— Tightly Integrated with Leading CAE Vendor Tools
— Productivity Enhancing Timing Analyzer, Explore
Tools, Timing Simulator and ispANALYZER™
— PC and UNIX Platforms
产品属性
- 型号:
2064VL
- 制造商:
LATTICE
- 制造商全称:
Lattice Semiconductor
- 功能描述:
2.5V In-System Programmable SuperFAST⑩ High Density PLD
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TE |
23+ |
NA |
25800 |
TE全系列在售国内外渠道 |
询价 | ||
三年内 |
1983 |
纳立只做原装正品13590203865 |
询价 | ||||
CTS |
23+ |
NA |
806 |
专做原装正品,假一罚百! |
询价 | ||
206-5 |
16 |
16 |
询价 | ||||
TI/德州仪器 |
23+ |
SOP-8 |
15000 |
全新原装现货,价格优势 |
询价 | ||
原厂 |
16+ |
原厂封装 |
10000 |
全新原装正品,代理优势渠道供应,欢迎来电咨询 |
询价 | ||
TycoElectronicsAmp |
07+/08+ |
4 |
询价 | ||||
TI/德州仪器 |
23+ |
SOP-8 |
6500 |
只做原装正品现货!或订货假一赔十! |
询价 | ||
CTS |
2308+ |
349413 |
一级代理,原装正品,公司现货! |
询价 | |||
KeystoneElectronics |
新 |
5 |
全新原装 货期两周 |
询价 |